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19-2845; Rev 1; 10/03
USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors
General Description
The MAX3353E I 2 CTM-compatible USB On-The-Go (OTG) regulated charge pump with switchable pullup/pulldown resistors allows peripherals and mobile devices such as PDAs, cellular phones, and digital cameras to be interconnected without a host PC. The MAX3353E enables a system with an integrated USB dual-role transceiver to function as a USB OTG dual-role device. The charge pump in the MAX3353E supplies VBUS power and signaling that is required by the transceiver as defined in On-The-Go Supplement: USB 2.0, Revision 1.0. The MAX3353E provides the switchable pullup and pulldown resistors on D+ and Drequired for a dual-role device. The MAX3353E integrates a regulated charge pump, switchable pullup/pulldown resistors, and an I2C-compatible 2-wire serial interface. The device provides a detector to monitor ID status and operates with logic supply voltages (VL) between +1.65V and VCC and charge-pump supply voltages (V CC ) from +2.6V to +5.5V. The charge pump supplies an OTG-compatible output on VBUS while sourcing 8mA output current. The MAX3353E enables USB OTG communication between digital logic parts that cannot supply or tolerate the +5V VBUS levels that USB OTG requires. By controlling and measuring VBUS using internal comparators, this device supports USB OTG session request protocol (SRP) and host negotiation protocol (HNP). The MAX3353E has built-in 15kV ESD protection circuitry to guard VBUS, ID_IN, D+, and D-. The MAX3353E is available in a 5 x 4 chip-scale package (UCSPTM) and 16-pin TSSOP package.
Features
o Ideal for Enabling USB Dual-Role Components for USB OTG Protocol o Charge Pump for VBUS Signaling and Operation Down to +2.6V o Level Translators Allow Low-Voltage System Interface o Internal VBUS Comparators and ID Detector o Internal Switchable Pullup and Pulldown Resistors for Host/Peripheral Functionality o I2C-Compatible Bus Interface with Command and Status Registers o Interrupt Features o 15kV ESD Protection on ID_IN, VBUS, D+, and Do Supports SRP and HNP o Available in 5 x 4 UCSP and 16-Pin TSSOP
MAX3353E
Ordering Information
PART MAX3353EEUE MAX3353EEBP-T TEMP RANGE PINPACKAGE PKG CODE -- B20-4
-40C to +85C 16 TSSOP -40C to +85C 5 x 4 UCSP
Applications
Mobile Phones PDAs Digital Cameras MP3 Players Photo Printers
Pin Configurations appear at end of data sheet. Typical Applications Circuit appears at end of data sheet.
SCL ID_OUT VBUS COMPARATORS VCC
Functional Diagram
C+ C-
CHARGE PUMP
CURRENT GENERATOR
200k
VBUS ID DETECTOR ID_IN 15kV ESD PROTECTION I2C INTERFACE AND CONTROL LOGIC
VL
D+
DSE0 DRIVER PULLUP/DOWN RESISTORS VTRM
UCSP is a trademark of Maxim Integrated Products, Inc. Purchase of I2C components from Maxim Integrated Products, Inc., or one of its sublicensed Associated Companies, conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips.
SDA INT ADD
110k
MAX3353E
________________________________________________________________ Maxim Integrated Products
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For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors MAX3353E
ABSOLUTE MAXIMUM RATINGS
(All voltages referenced to GND.) VCC, VL, VTRM ..........................................................-0.3V to +6V D+, D-, ID_IN (Note 1)..............................................-0.3V to +6V VBUS (Notes 1, 2) .....................................................-0.3V to +6V C+..................................................................(VCC - 0.3V) to +6V C-................................................................-0.3V to (VCC + 0.3V) INT, ID_OUT ..................................................-0.3V to (VL + 0.3V) SDA, SCL, ADD .......................................................-0.3V to +6V VBUS Output Short Circuit to Ground ....................... Continuous Output Current (all other pins) .........................................15mA Note 1: 15kV ESD protected. Note 2: VBUS can be backdriven to +6V.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Continuous Power Dissipation (TA = +70C) 16-Pin TSSOP (derate 9.4mW/C above +70C) .........755mW 5 x 4 UCSP (derate 7.8mW/C above +70C) .............625mW Operating Temperature Range ...........................-40C to +85C Storage Temperature Range .............................-65C to +150C Junction Temperature ......................................................+150C Lead Temperature (soldering 10s) .................................+300C Bump Temperature (soldering) Infrared (15s) ...............................................................+200C Vapor Phase (20s) .......................................................+215C
ELECTRICAL CHARACTERISTICS
(VCC = +2.6V to +5.5V, VL = +1.65V to VCC, VTRM = +3V to +3.6V, CFLYING = 0.1F, VCC decoupled with 1F capacitor to ground; VTRM and VL decoupled with 0.1F capacitor to ground; CVBUS = 1F (min), TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +4V, VL = +1.8V, VTRM = +3.3V, and TA = +25C.) (Notes 3, 4)
PARAMETER Supply Voltage Logic Supply Voltage VTRM Supply Voltage SYMBOL VCC VL VTRM ID_IN floating, VBUS_CHG1 = 0, VBUS_CHG2 = 0, VBUS_DRV = 0, BDISC_ACONN = 0 VBUS_DRV = 1, VBUS_CHG1= 0, VBUS_CHG2 = 0, IVBUS = 8mA VCC Shutdown Supply Current VTRM Supply Current VL Input Current ID_OUT, INT Output Voltage High SDA, INT, ID_OUT Output Voltage Low SDA, SCL, ADD Input Voltage High SDA, SCL, ADD Input Voltage Low Input/Three-State Output Leakage Current (SDA, SCL, INT) ICC(SHDN) No activity on I2C serial bus IVTRM IVL VOH VOL VIH VIL INT configured to open drain DP_PULLDWN = 1, DP_PULLUP = 0, DM_PULLDWN = 1, DM_PULLUP = 0 no activity on USB serial bus No activity on I2C serial bus INT configured to push/pull; source current ILOAD = +1mA Sink current ILOAD = -1mA 0.67 x VL 0.4 1 VL - 0.4 0.4 CONDITION MIN 2.6 1.65 3.0 73 TYP MAX 5.5 VCC 3.6 100 UNITS V V V A
VCC Operating Supply Current
ICC
18 0.4
25 2 1 1
mA A A A V V V V A
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USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +2.6V to +5.5V, VL = +1.65V to VCC, VTRM = +3V to +3.6V, CFLYING = 0.1F, VCC decoupled with 1F capacitor to ground; VTRM and VL decoupled with 0.1F capacitor to ground; CVBUS = 1F (min), TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +4V, VL = +1.8V, VTRM = +3.3V, and TA = +25C.) (Notes 3, 4)
PARAMETER ADD Pulldown Resistor ESD PROTECTION (VBUS, ID_IN, D+, D-) Human Body Model ESD Protection IEC1000-4-2 Air-Gap Discharge IEC1000-4-2 Contact Discharge VBU S/CHARGE-PUMP SPECIFICATIONS (VBUS_DRV = 1, VBUS_DISCHG = 0, VBUS_CHG1 = 0, VBUS_CHG2 = 0, unless otherwise noted.) VBUS Output Voltage VBUS Output Current VBUS Short-Circuit Current Output Ripple Efficiency Switching Frequency VBUS Voltage in Three-State Mode VBUS Pulldown Resistance VBUS Input Impedance f VBUS_DRV = 0 VBUS_DRV = 0, VBUS_DISCHG = 1 VBUS_DRV = 0 CLOAD = 15F CLOAD = 95F (Note 5) VBUS_CHG1 = 1, VBUS_CHG2 = 0 (Note 5) 450 56 600 105 3.2 40 2.1 1.9 850 155 5.1 VBUS IVBUS VBUS shorted to GND IVBUS = 8mA, CVBUS = 1F VCC = 2.6V, IVBUS = 8mA IVBUS = 0 to 8mA, CVBUS = 1F 4.63 8 140 100 80 600 0.2 6.5 100 250 5.25 V mA mA mV % kHz V k k 15 11 6 kV SYMBOL CONDITION MIN TYP 110 MAX UNITS k
MAX3353E
VBUS AND CURRENT SOURCE SPECIFICATIONS (VBUS_CHG1 = 1, VBUS_CHG2 = 0, VBUS_DRV = 0, VBUS_DISCHG = 0) VBUS Output Voltage VBUS Current Source VBUS Current Gate Time COMPARATOR SPECIFICATIONS VBUS_VALID Comparator Threshold VBUS_VALID Comparator Hysteresis SESSION_VALID Comparator Threshold SESSION_VALID Comparator Hysteresis B_SESSION_END Comparator Threshold B_SESSION_END Comparator Hysteresis SINGLE-ENDED RECEIVERS AND SE0 SPECIFICATIONS (D+, D-) Low-Level Input Threshold High-Level Input Threshold 2.0 0.8 V V 0.4 1.0 4.40 4.55 20 1.4 20 0.5 35 0.6 1.8 4.63 V mV V mV V mV VBUS V A ms
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USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors MAX3353E
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +2.6V to +5.5V, VL = +1.65V to VCC, VTRM = +3V to +3.6V, CFLYING = 0.1F, VCC decoupled with 1F capacitor to ground; VTRM and VL decoupled with 0.1F capacitor to ground; CVBUS = 1F (min), TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +4V, VL = +1.8V, VTRM = +3.3V, and TA = +25C.) (Notes 3, 4)
PARAMETER Hysteresis Voltage Output Voltage Low (D+ and D- in SE0 state) SYMBOL VHYST ISINK = -2.4mA CONDITION MIN TYP 0.2 0.3 MAX UNITS V V
PULLUP/PULLDOWN RESISTOR SPECIFICATIONS (D+, D-, ID_IN) Pulldown Resistor on D+ Pulldown Resistor on DPullup Resistor on D+ Pullup Resistor on DD- Leakage Current D+ Leakage Current DP_PULLDWN = 1, DP_PULLUP = 0, BDISC_ACONN = 0 DM_PULLDWN = 1, DM_PULLUP = 0, BDISC_ACONN = 0 DP_PULLDWN = 0, DP_PULLUP = 1, BDISC_ACONN = 0 DM_PULLDWN = 0, DM_PULLUP = 1, DP_PULLUP = 0, BDISC_ACONN = 0 DM_PULLDWN = 0, DM_PULLUP = 0, BDISC_ACONN = 0 DP_PULLDWN = 0, DP_PULLUP = 0, BDISC_ACONN = 0 DP_PULLUP = 0, DP_PULLDWN = 0, DM_PULLUP = 0, DM_PULLDWN = 0, BDISC_ACONN = 0 300 140 200 270 0.33 x VCC 0.67 x VCC 14.25 14.25 1.425 1.425 15.75 15.75 1.575 1.575 1 1 k k k k A A
Input Impedance on D+/DID_IN Pullup Resistor ID_IN Input Voltage Low ID_IN Input Voltage High
k k V V
TIMING CHARACTERISTICS
(VCC = +2.6V to +5.5V, VL = +1.65V to VCC, VTRM = +3V to +3.6V, CFLYING = 0.1F, VCC decoupled with 1F capacitor to ground. VTRM and VL decoupled with 0.1F capacitor to ground. CVBUS = 1F (min), TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C, VCC = +4V, VL = +1.8V, VTRM = +3.3V.) (Notes 3, 4)
PARAMETER Time to Assert D+ Pullup Time to Assert SE0 Interrupt Propagation Delay VBUS Rise Time INT Out Rise Time SYMBOL CONDITION BDISC_ACONN = 1, ID_IN = GND (A Device) BDISC_ACONN = 1, ID_IN = floating (B Device) (Note 6) From 0 to 4.4V; CLOAD = 1F; IVBUS = 8mA; VBUS_DRV = 1 INT out push/pull configured, CLOAD = 50pF 20 0.025 0.061 MIN TYP MAX 1 1 1 100 UNITS ms ms s ms ns
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USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors
TIMING CHARACTERISTICS (continued)
(VCC = +2.6V to +5.5V, VL = +1.65V to VCC, VTRM = +3V to +3.6V, CFLYING = 0.1F, VCC decoupled with 1F capacitor to ground. VTRM and VL decoupled with 0.1F capacitor to ground. CVBUS = 1F (min), TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C, VCC = +4V, VL = +1.8V, VTRM = +3.3V.) (Notes 3, 4)
PARAMETER INT Out Fall Time ID_OUT Rise Time ID_OUT Fall Time Time to Exit Shutdown Time to Enter Shutdown SYMBOL CLOAD = 50pF CLOAD = 50pF CLOAD = 50pF CONDITION MIN TYP 20 30 10 500 1000 MAX UNITS ns ns ns s s
MAX3353E
I2C/SMBUS-COMPATIBLE TIMING SPECIFICATIONS
(VCC = +2.6V to +5.5V, VL = +1.65V to VCC, VTRM = +3V to +3.6V, CFLYING = 0.1F, VCC decoupled with 1F capacitor to ground. VTRM and VL decoupled with 0.1F capacitor to ground. CVBUS = 1F (min). TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +4V, VL = +1.8V, VTRM = +3.3V, and TA = +25C.) (Notes 3, 4)
PARAMETER Serial Clock Frequency Bus Free Time Between Stop and Start Conditions Start Condition Hold Time Stop Condition Setup Time Clock Low Period Clock High Period Data Setup Time Data Hold Time Maximum Receive SCL/SDA Rise Time Minimum Receive SCL/SDA Rise Time Maximum Receive SCL/SDA Fall Time Minimum Receive SCL/SDA Fall Time Transmit SDA Fall Time (Note 4) Pulse Width of Suppressed Spike SYMBOL fSCL tBUF tHD:STA tSU:STO tLOW tHIGH tSU:DAT tHD:DAT tR tR tF tF tF tF tSP (Note 7) (Note 8) (Note 8) (Note 8) (Note 8) CB = 400pF, ISDA = 3mA, VL 2.5V CB = 50pF, ISDA = 3mA, VL < 2.5 (Note 9) CONDITION MIN DC 1.3 0.6 0.6 1.3 0.6 100 0 300 20 + 0.1CB 300 20 + 0.1CB 20 + 0.1CB 20 + 0.1CB 50 250 250 0.9 TYP MAX 400 UNITS kHz s s s s s ns s ns ns ns ns ns ns
Note 3: All currents into the device are negative; currents out of the device are positive. All voltages are referenced to device ground unless otherwise specified. Note 4: Parameters are 100% production tested at +25C, limits over temperature are guaranteed by design. Note 5: The VBUS current source and current gate time vary together with process and temperature such that the resulting VBUS pulse is guaranteed to drive a <13F load to a voltage >2.0V, and to drive a >96F load to a volatge <2.2V. See the SRP VBUS Pulsing section for an explanation of this self-timed pulse. Note 6: Guaranteed by design, not production tested. Note 7: A master device must provide a hold time of at least 300ns for the SDA signal to bridge the undefined region of SCL's falling edge. Note 8: CB is total capacitance of one bus line in pF. Tested with CB = 400pF. Note 9: Input filters on SDA, SCL, and ADD suppress noise spikes less than 50ns. _______________________________________________________________________________________ 5
USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors MAX3353E
Typical Operating Characteristics
(VCC = +3V, VL = +2.5V, CFLYING = 0.1F, CVBUS = 1F (ESRCVBUS = 0.1), TA = +25C.)
INPUT CURRENT vs. OUTPUT CURRENT
MAX3353 toc01
VBUS OUTPUT VOLTAGE vs. VBUS OUTPUT CURRENT
MAX3353 toc02
VBUS OUTPUT VOLTAGE vs. INPUT VOLTAGE
MAX3353 toc03
120 100 INPUT CURRENT (mA) 80 60 40 20 0 0 10 20 30 40 VCC = 2.6V VCC = 3.3V VCC = 4.2V
5.25 VCC = 4.2V VCC = 3.3V
4.90
VBUS OUTPUT VOLTAGE (V)
VBUS OUTPUT VOLTAGE (V)
5.00
4.85 IVBUS = 8mA 4.80 IVBUS = 0 4.75
4.75 VCC = 2.6V 4.50
4.25
4.00 50 0 10 20 30 40 50 OUTPUT CURRENT (mA) OUTPUT CURRENT (mA)
4.70 2.5 3.0 3.5 4.0 4.5 5.0 5.5 INPUT VOLTAGE (V)
TIME TO ENTER SHUTDOWN
MAX3353 toc04
TIME TO EXIT SHUTDOWN
MAX3353 toc05
VBUS WITH CAPACITIVE LOAD
MAX3353 toc06
ICC 10mA/div ICC 5mA/div
CL = 10F
VBUS 1V/div
SCL 5V/div
SCL 5V/div
CL = 96F
VBUS 1V/div
200s/div
100s/div
40ms/div
VBUS INPUT IMPEDANCE vs. TEMPERATURE
MAX3353 toc07
SUPPLY CURRENT vs. TEMPERATURE
IVBUS = 8mA SUPPLY CURRENT (mA) 19 VCC = 2.6V
MAX3353 toc08
68.0 67.5 67.0 66.5 66.0 65.5 65.0 -40 -15 10 35 60
20
VBUS INPUT IMPEDANCE (k)
18 VCC = 3.3V 17 VCC = 4.2V
16 85 -40 -15 10 35 60 85 TEMPERATURE (C) TEMPERATURE (C)
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USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors
Pin Description
PIN TSSOP 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 UCSP C5 D5 D4 C3 D3 D2 D1 C1 B1 A1 A2 -- A3 A4 A5 B5 NAME VCC VL SDA ADD SCL INT ID_OUT VTRM DD+ ID_IN N.C. GND CC+ VBUS FUNCTION Power-Supply Input. VCC input range is +2.6V to +5.5V. Bypass VCC to GND with a 1F capacitor. Logic Supply. VL sets the logic output high voltage and logic input high threshold for SDA, SCL, INT, and ID_OUT. VL can range from +1.65V to VCC. Bypass VL to GND with a 0.1F capacitor. Serial Data Input/Output. I2C bus serial data input/open-drain output can be driven above VL. Address Select Input. Address selection for the I2C-compatible interface. ADD has an internal 110k pulldown resistor (see the 2-Wire I2C Compatible Serial Interface section for details). Serial Clock Input. I2C bus serial clock input. Can be driven above VL. Interrupt Output. INT is an active-low output and can be set either open-drain or push/pull output through control register 1 (default = open drain). Device ID Output. Output of ID_IN level translated to VL. Termination Supply Input. Connect +3V to +3.6V supply voltage for internal USB pullup resistors. Bypass VTRM to GND with a 0.1F capacitor. USB D- (15kV ESD Protected) USB D+ (15kV ESD Protected) Device ID Input. Internally pulled up to VCC. ID_IN logic state is VL level translated to ID_OUT and can be read through the I2C interface (15kV ESD protected). No Connection. Not internally connected. Ground Charge-Pump Capacitor Negative Connection Charge-Pump Capacitor Positive Connection OTG Bus Supply. Provides power to the bus. VBUS can be back-driven to +6V. Bypass VBUS to GND with a 1F capacitor.
MAX3353E
Detailed Description
The MAX3353E integrates a regulated charge pump, switchable pullup/pulldown resistors, and an I 2 Ccompatible 2-wire serial interface. The internal level shifter allows the device to operate with logic supply voltages (VL) between +1.65V and VCC. The MAX3353E's OTG-compliant charge pump operates with input supply voltages (VCC) from +2.6V to +5.5V and supplies an OTG-compatible output on VBUS while sourcing 8mA output current. The MAX3353E level-detector comparators monitor important VBUS voltages needed to support SRP and HNP and provides an interrupt output signal for OTG events that require action. The VBUS power-control block performs the various switching functions required by an OTG dual-role device and is programmable by system logic. For OTG operation, D+ and D- are connected to switchable pulldown resistors (host) and switchable pullup resistors (peripheral) controlled by internal registers.
Charge Pump
The MAX3353E's OTG-compliant charge-pump operates with input supply voltages (VCC) from +2.6V to +5.5V and supplies an OTG-compatible output on VBUS with the capability of sourcing 8mA (min) output current. When VBUS is not providing power, an input impedance of no more than 100k and no less than 40k to GND is present on VBUS. When VBUS provides power, the rise time on VBUS from 0 to 4.4V is no longer than 100ms when driving a constant current load of 8mA and an external load capacitance of 13F. During a continuous short circuit on VBUS, the chargepump output is current limited to 140mA (typ). Thermalshutdown circuitry turns off the charge pump if the die temperature exceeds +150C and restarts when the die cools to 140C.
Level Shifters
Internal level shifters allow the system-side interface to run at logic supply voltages as low as 1.65V. Interface logic signals are referenced to the voltage applied to VL.
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USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors MAX3353E
VBUS Level-Detection Comparators
Comparators drive status register bits 0, 1, and 2 to indicate these important USB OTG VBUS voltage levels: * VBUS is valid (VBUS > 4.6V) * A USB session is valid (VBUS > 1.4V) * A USB session is ended (VBUS < 0.5V) The 4.6V comparator sets bit 0 in status register VBUS_VALID to 1 if VBUS > 4.6V. The A Device uses the VBUS valid status bit (VBUS_VALID) to determine if the B Device is sinking too much current (i.e., is not supported). The interrupt can be associated to either a positive or a negative transition. The 1.4V comparator sets bit 1 of status register SESSION_VALID to 1 if VBUS > 1.4V. This status bit indicates that a data transfer session is valid and the interrupt can be associated to either a positive or a negative transition. The session-end comparator sets bit 2 in the status register SESSION_END to a 1 when VBUS < 0.5V, and generates an interrupt when VBUS falls below 0.5V. Figure 1 shows the level-detector comparators.
VBUS
VBUS_VALID 4.6V
SESSION_VALID 1.4V
SESSION_END 0.5V
Figure 1. Comparator Network Diagram
VCC
Interrupt Logic
When OTG events require action, the MAX3353E provides an interrupt output signal on INT. An interrupt is triggered (INT goes low) when one of the conditions specified by the interrupt-mask register and interruptedge register is verified. INT stays active until the interrupt is cleared by reading the interrupt latch register.
CHARGE PUMP ON/OFF
CURRENT SOURCE
VBUS 67k
Shutdown
In shutdown mode, the MAX3353E's quiescent current is reduced to less than 2A. Bit 0 in control register 2 controls the shutdown feature. Setting bit 0 = 1 places the device in shutdown mode (Figure 2, Table 5). When in shutdown, the MAX3353E's charge-pump current generator and VBUS detection comparators are turned off. During shutdown, the I2C serial interface is fully functional and registers can be read from or written to. ID_IN and ID_OUT are both functional in shutdown.
CURRENT GATE TIMER 7 0 DEFAULT (POWER-ON) VALUES NOTE: SWITCHES ARE SHOWN IN THEIR DEFAULT (POWER-ON) POSITIONS. A "1" CLOSES A SWITCH. 6 0 5 0 4 0 3 0 2 0 1 0 0 1
5k
CONTROL REGISTER 2
0 = OPERATING MODE 1 = SHUTDOWN MODE
VBUS Power Control
VBUS is a dual-function I/O that can supply USB OTGcompliant voltage to the USB. The VBUS power-control block performs the various switching functions required by an OTG dual-role device. This action is programmed by the system logic using internal register control bits in control register 2. * Discharge VBUS through a resistor to ensure a session is not in progress. * Charge VBUS through an internal current generator to initiate SRP (session request protocol). * Connect the charge pump to VBUS to provide power on VBUS.
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Figure 2. Power-Control Block Diagram
Bit 0 (SDWN) in control register 2 is used to place the MAX3353E in normal operation or shutdown mode. Setting bit 1 (VBUS_CHG1) issues a timed pulse on VBUS suitable for implementing the session request protocol (see the SRP VBUS Pulsing section). The pulse is created by turning a current source - supplied by VCC and connected to VBUS - on and off. Setting control register bit 2 (VBUS_CHG2) to 1 charges VBUS through the current source continuously. Setting VBUS_CHG2 to zero disconnects the current source. Bit 3 (VBUS_DRV) turns the
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USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors
charge pump on and off to power VBUS. Bit 4 in control register 2 (VBUS_DISCHG) is used to discharge VBUS through a 5k resistor. Figure 2 and Table 2 show power control. 2) The A_HNP_EN control bit is set, and an interrupt is issued as the D+ pullup is connected (see also the Interrupt Logic section). By clearing BDISC_ACONN bit, the D+ pullup is disconnected. After a successful autoconnect operation, the firmware should set the DP_PULLUP control bit before clearing the BDISC_ACONN bit; this ensures that the D+ pullup remains connected. Note: The autoconnect works only if MAX3353E is not in shutdown. Autoresponse Details When the MAX3353E is configured as a B Device (ID_IN = open), setting the BDISC_ACONN control bit enables the autoresponse feature. Using this feature, the MAX3353E automatically issues a USB bus reset when the A Device becomes a peripheral. Firmware can take advantage of the autoresponse feature of the MAX3353E by doing the following: * Ensure that the system transceiver is in USB-suspend mode. Wait until the USB-suspend conditions are met (no USB activity for >3ms). Enable autoresponse. Set the BDISC_ACONN control bit. Signal a USB disconnect. Firmware clears the DP_PULLUP control bit, which disconnects the D+ pullup resistor. At this point, the MAX3353E waits at least 25s before enabling its internal USB line monitor to detect if the A Device has attached its D+ pullup; this ensures that the D+ line is not high due to the residual effect of the B Device pullup. When the A Device has connected its D+ pullup, the MAX3353E issues a bus reset (SE0) and the B_HNP status bit goes high. * Wait for B_HNP to go high; output SE0 from the ASIC or other device on D+/D-. Disable autoresponse. By clearing BDISC_ACONN bit, the SE0 generator is turned off. The SE0 is maintained by the system USB transceiver. Note: The autoresponse works only if the MAX3353E is not in shutdown. SRP VBUS Pulsing Session request protocol (SRP) is designed to allow the A Device (default host) to conserve power by turning off VBUS when there is no USB traffic. The B Device (default peripheral) can request the A Device to turn VBUS on and initiate a new session through SRP. The B Device must initiate SRP in two ways: data-line and VBUS pulsing. Firmware is responsible for turning on and off the pullup resistor on D+ to implement data-line pulsing. Firmware can also be used to turn on and off a current source to implement VBUS pulsing.
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MAX3353E
Autoconnect and Autoresponse
USB OTG defines the HNP, where the default host (A Device) can pass the host responsibilities off to the default peripheral (B Device). This protocol can be handled entirely by the firmware and controlling logic that drives the OTG transceiver. The MAX3353E has the option to automatically perform some of the required signaling for some of the timing-critical events in the HNP process. The automatic signaling used by the A Device, when it transfers host control to the B Device, is defined by the OTG transceiver supplement and is known as autoconnect. Autoconnect allows the transceiver to automatically connect the A Device's D+ pullup resistor during HNP. Autoconnect is enabled when the MAX3353E is configured as an A Device (ID_IN = 0) and the BDISC_ACONN control bit is set. The MAX3353E also has the capability to automate the signaling used by the B Device when it assumes host control from the A Device. This autoresponse is not specified by the OTG-transceiver supplement. Autoresponse causes the B Device to automatically assert a bus reset by driving a single-ended zero (SE0: both D+ and D- driven low) onto USB in response to the A Device connecting its D+ pullup resistor. Autoresponse is enabled when the MAX3353E is configured as a B Device and the BDISC_ACONN control bit is set. Note: In a system, D+ and D- are also driven by a transceiver in an ASIC or other device. The autoresponse mode should not be used unless the system designer can ensure that there is no bus conflict between the transceiver and the MAX3353E driving USB to SE0. Autoconnect Details When the MAX3353E is configured as an A Device (ID_IN = GND), it can enable autodetect by setting BDISC_ACONN to one. This should be done after the USB is in the suspend state (>3ms with no traffic). The MAX3353E monitors D+/D- for an SE0. The presence of the SE0 indicates that the B Device has disconnected its pullup resistor, the first step in HNP. When SE0 is detected, the MAX3353E automatically turns on its internal pullup resistor to the D+ line within 3ms. There are two ways for firmware to ascertain that the MAX3353E has automatically turned on its D+ pullup during HNP: 1) The A_HNP status bit goes high when the D+ pullup is automatically connected during HNP
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USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors
The MAX3353E also has a special feature that allows it to control the timing of the VBUS pulse. Since an OTG device could be plugged into a PC, the VBUS pulse must be particularly well controlled to prevent damage to a PC host. For this reason, VBUS pulsing is done by turning on and off a current source. The VBUS pulse must be timed so it drives a 13F load (when it is connected to the A Device) to a voltage greater than 2.1V, and it drives a >96F load (when it is connected to a standard PC) to a voltage less than 2.0V. Firmware can control the current source and the timing of the VBUS pulse through the VBUS_CHG2 control bit. The MAX3353E also has the capability to time the pulse
VTRM 1.5k BIT 4 BIT 5 SW1 SW2 0 0 OPEN OPEN 0 1 OPEN CLOSED 1 0 CLOSED OPEN 1 1 CLOSED OPEN SW1
MAX3353E
itself. Firmware initiates the self-timed VBUS pulse by setting the VBUS_CHG1 control bit to 1. The internal timer and current generator guarantee that the VBUS voltage goes above 2.1V if CVBUS < 13F within 90ms and stands below 2.0V if CVBUS > 96F. Once the time has elapsed, if another VBUS pulse is required, it is necessary to clear the VBUS_CHG1 bit and then set it again. Note: SRP VBUS pulsing and its associated current generator work only if the MAX3353E is not in shutdown.
Data-Line Pullup and Pulldown Resistance
For OTG operation, D+ and D- are connected to switchable pulldown resistors (host) and switchable pullup resistors (peripheral). Data-line pullup/pulldown resistors are individually controlled through data bits 4 through 7 in control register 1. Two 15k pulldown resistors allow the device to be set as a host and are asserted by bits 6 and 7. The 1.5k pullup resistor is applied to the data lines through SW1 and SW2, which are controlled by bits 4 and 5. D+ pullup has higher priority to avoid direct connection of D+ and D-. Each of the control bits controls a designated switch; therefore, pullup and pulldown switches can be asserted at the same time. A simplified schematic of the switching network is shown in Figure 3. The bidirectional D+ and D- lines are ESD protected to 15kV, reducing external components in many applications.
SW2
D+ D15k SW4 15k SW3
Applications Information
2-Wire I2C-Compatible Serial Interface
GND
7 0 DEFAULT (POWER ON) VALUES
6 0
5 0
4 0
3 0
2 0
1 0
0 0
A register file that interfaces to the control logic uses a simple 2-wire interface operating up to 400kHz to control the various switches and modes. Serial Addressing The MAX3353E operates as a slave that sends and receives control and status signals through an I 2Ccompatible 2-wire interface. The interface uses a serial data line (SDA) and a serial clock line (SCL) to achieve
CONTROL REGISTER 1 NOTE: SWITCHES ARE SHOWN IN THEIR DEFAULT (POWER-ON) POSITIONS. A "1" CLOSES A SWITCH.
Figure 3. Pullup and Pulldown Resistors Network
SCL
tF
tLOW
tR tHIGH tSU:DAT tHD:DAT tSU:STO tBUF
tHD:STA SDA
Figure 4. 2-Wire Serial Interface Timing Details 10 ______________________________________________________________________________________
USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors
SDA
the master is transmitting to the MAX3353E, the MAX3353E generates the acknowledge bit because it is the recipient. When the MAX3353E is transmitting to the master, the master generates the acknowledge bit because the master is the recipient.
MAX3353E
Slave Address
SCL S START CONDITION P STOP CONDITION
Figure 5. Start and Stop Conditions
bidirectional communication between master(s) and slave(s). A master (typically a microcontroller) initiates all data transfers to and from the MAX3353E and generates the SCL clock that synchronizes the data transfer (Figure 4). The MAX3353E SDA line operates as both an input and an open-drain output. A pullup resistor (4.7k typ) is required on SDA. The MAX3353E SCL line operates only as an input. A pullup resistor (4.7k typ) is required on SCL if there are multiple masters on the 2wire interface, or if the master in a single-master system has an open-drain SCL output. Each transmission consists of a START condition (Figure 5) sent by a master, followed by the MAX3353E 7-bit slave address plus R/W bit (Figure 6), a register address byte, one or more data bytes, and finally a STOP condition (Figure 5). Start and Stop Conditions Both SCL and SDA remain high when the interface is not busy. A master signals the beginning of a transmission with a START (S) condition by transitioning SDA from high to low while SCL is high. When the master has finished communicating with the slave, it issues a STOP (P) condition by transitioning the SDA from low to high while SCL is high. The bus is then free for another transmission (Figure 5). Bit Transfer One data bit is transferred during each clock pulse. The data on the SDA line must remain stable while SCL is high (Figure 7). Acknowledge The acknowledge bit is the clocked ninth bit that the recipient uses to handshake receipt of each byte of data (Figure 8). Thus, each byte transferred effectively requires 9 bits. The master generates the 9th clock pulse, and the recipient pulls down SDA during the acknowledge clock pulse, such that the SDA line is stable low during the high period of the clock pulse. When
The MAX3353E has a 7-bit-long slave address. The eighth bit following the 7-bit slave address is the R/W bit. It is low for a write command, high for a read command. The first 6 bits (MSBs) of the MAX3353E slave address are always 010110. Select slave address bit A0 by connecting the address input ADD to VL, GND, or leave floating (ADD is internally pulled to GND through a 110k resistor). The MAX3353E has two possible slave addresses (Table 1). As a result, only two MAX3353E devices can share the same interface.
Write Byte Format
A write to the MAX3353E comprises the transmission of the MAX3353E's slave address with the R/W bit set to zero, followed by 2 bytes of information. The first byte of information is the command byte that determines which register of the MAX3353E is to be written by the second byte. The second byte is the data that goes into the register that is set by the first byte. Figure 9 shows the typical write byte format.
Read Byte Format
A read from the MAX3353E comprises the transmission of the MAX3353E's slave address (from the master) with the R/W bit set to zero, followed by one byte containing the address of the register, from which the master is going to read data, and then followed by MAX3353E's slave address again with the R/W bit set to one. After that one byte of data is being read by the master. Figure 10 shows the read byte format that must be used. To read many contiguous registers, multiple accesses are required.
Registers
Control Registers (10h, 11h) There are two read/write control registers. Control register 1 is used to set D+, D- pullup or pulldown, and to set interrupt output to open-drain or push-pull. Control register 2 is the bus control register used to control the bus operation and put the device into shutdown mode. (Tables 3, 4, and 5.) Status Register (13h) The status register is a read-only register for determining valid bus and session comparator thresholds, ID_IN status, and HNP success. Tables 6 and 7 show status register address map, bit configuration, and description.
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11
USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors MAX3353E
SDA START SCL 0 1 0 1 1 0 A0 R/W ACK
MSB
LSB
Figure 6. Slave Address
START CONDITION CLOCK PULSE FOR ACKNOWLEDGMENT
SDA
SCL
1
2
8
9
SCL
SDA BY TRANSMITTER
DATA LINES STABLE, CHANGE OF DATA VALID DATA ALLOWED
SDA BY RECEIVER
S
Figure 7. Bit Transfer
S A6 A5 PART ADDRESS A4 A3 7 bits A2 A1 A0 R/W 0 W ACK
Figure 8. Acknowledge
REGISTER ADDRESS 8 bits ACK
DATA A7 A6 A5 A4 8 bits Where: Slave address: Part address Register address: Selecting which register to write to Data: Data byte being read by the master R/W: Read/Write (R/W = 1: Read; R/W = 0: Write) S: Start condition A3 A2 A1 A0
ACK
P
P: Stop condition ACK: Acknowledge bit from the slave NACK: Not acknowledged bit from the master Blank: Master transmission Shaded: Slave transmisstion
Figure 9. Write Byte Format
S A6 A5 PART ADDRESS A4 A3 7 bits A2 A1 A0 R/W 0 ACK 0 8 bits REGISTER ADDRESS ACK 0
RS A6 A5
PART ADDRESS A4 A3 7 bits A2 A1 A0
R/W 1
ACK 0
DATA 8 bits
NACK 1
P
Where: Slave address: Part address Register address: Selecting which register to write to Data: Data byte being read by the master R/W: Read/Write (R/W = 1: Read; R/W = 0: Write) S: Start condition
P: Stop condition ACK: Acknowledge bit from the slave NACK: Not acknowledged bit from the master Blank: Master transmission Shaded: Slave transmisstion
Figure 10. Read Byte Format 12 ______________________________________________________________________________________
USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors
Table 1. MAX3353E Address Map
ADD PIN Float or GND VL ADDRESS BITS A6 0 0 A5 1 1 A4 0 0 A3 1 1 A2 1 1 A1 0 0 A0 0 1
Interrupt Registers (14h, 15h, 16h) There are three interrupt registers. Interrupt mask register is a read/write register used to enable interrupts and read status of interrupts. Interrupt edge register is a read/write register for setting and determining interrupts for positive and negative edges. Interrupt latch register is a read only register to check and validate interrupt requests. Table 8 shows the interrupt mask,
MAX3353E
Table 2. Register Address Map
NAME Manufacturer Register 0 Manufacturer Register 1 Manufacturer Register 2 Manufacturer Register 3 Product ID Register 0 Product ID Register 1 Product ID Register 2 Product ID Register 3 Reserved Control Register 1 Control Register 2 Reserved Status Register Interrupt Mask Interrupt Edge Interrupt Latch Reserved ADD 00h 01h 02h 03h 04h 05h 06h 07h 08h-0Fh 10h 11h 12h 13h 14h 15h 16h 17h -Ffh BIT 7 0 0 0 0 0 0 0 0 -- DM_ PULLDWN -- -- -- -- -- A_HNP_RQ -- BIT 6 1 0 1 0 1 1 1 0 -- DP_ PULLDWN -- -- B_HNP -- -- ID_ FLOAT_RQ -- BIT 5 1 0 0 1 0 0 0 0 -- DM_ PULLUP -- -- A_HNP A_HNP_EN -- ID_ GND_RQ -- BIT 4 0 0 1 1 0 1 0 0 -- DP_ PULLUP VBUS_
DISCHG
BIT 3 1 1 0 0 1 1 0 0 -- -- VBUS_DRV -- ID_GND ID_ GND_EN -- SESSION_ VALID_RN --
BIT 2 0 0 0 0 0 0 0 0 -- BDISC_ ACONN
BIT 1 1 1 1 1 0 1 1 0 -- IRQ_MODE
BIT 0 0 1 1 1 0 0 0 1 -- -- SDWN -- VBUS_VALID VBUS_
VALID_EN
VBUS_CHG2 VBUS_CHG1 -- SESSION_ END SESSION_ END_EN -- VBUS_
VALID_RN
-- ID_FLOAT ID_ FLOAT_EN -- SESSION_ END_RQ --
-- SESSION_ VALID SESSION_ VALID_EN SESSION_ VALID_ED SESSION_ VALID_RP --
VBUS_
VALID_ED
VBUS_
VALID_RP
--
--
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13
USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors MAX3353E
interrupt edge, and interrupt latch address maps. Bit configuration is shown in Tables 9, 10, and 11. Manufacturer and ID Register Address Map The manufacturer and ID registers are read-only registers (Table 12).
External Capacitors
Five external capacitors are recommended for proper operation. Bypass VL and VTRM to GND with a 0.1F ceramic capacitor. Bypass VBUS and VCC to GND with a 1F low-ESR ceramic capacitor. For the internal charge pump, use a 0.1F ceramic capacitor between C+ and C-.
Table 3. Control Register Address Map
REGISTER Control 1 Control 2 ADDRESS 10h 11h POWER-UP REGISTER STATUS BIT 7 0 0 BIT 6 0 0 BIT 5 0 0 BIT 4 0 0 BIT 3 0 0 BIT 2 0 0 BIT 1 0 0 BIT 0 0 1
Table 4. Control Register 1 (10h)
BIT NUMBER 0 1 SYMBOL -- IRQ_MODE BDISC_ ACONN -- DP_PULLUP OPERATION Not used Interrupt pin open-drain/push-pull: 0 = open drain 1 = push/pull 0 = disable 1 = enable Not used D+ pullup (high priority) 0 = D+ pullup unconnected 1 = D+ pullup connected D- pullup: 0 = D- pullup unconnected 1 = D- pullup connected D+ pulldown: 0 = D+ pulldown unconnected 1 = D+ pulldown connected D- pulldown: 0 = D- pulldown unconnected 1 = D- pulldown connected
Table 5. Control Register 2 (11h)
BIT NUMBER 0 SYMBOL OPERATION Puts part in shutdown mode: 0 = operating 1 = shutdown mode Charge VBUS through a current generator for 105ms: 0 = current generator OFF 1 = current generator ON (automatically turned off after 105ms) Charge VBUS through a current generator: 0 = current generator OFF 1 = current generator ON Drive VBUS through charge pump 0 = VBUS not driven 1 = VBUS connected to the charge pump
SDWN
2 3 4
1
VBUS_CHG1
2
VBUS_CHG2
5
DM_PULLUP
6
DP_ PULLDWN
3
VBUS_DRV
7
DM_ PULLDWN
4 5 6 7
Discharge VBUS through a resistor: VBUS_DISCHG 0 = Resistor disconnected 1 = Resistor connected -- -- -- Not used Not used Not used
Table 6. Status Register Address Map
REGISTER Status ADDRESS 13h POWER-UP REGISTER STATUS BIT 7 0 BIT 6 0 BIT 5 0 BIT 4 -- BIT 3 -- BIT 2 -- BIT 1 -- BIT 0 --
(--) = don't know 14 ______________________________________________________________________________________
USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors MAX3353E
Table 7. Status Register (13h)
BIT NUMBER 0 SYMBOL CONTENTS Device A VBUS valid comparator, threshold = 4.55V: 0 = VBUS lower than threshold 1 = VBUS higher than threshold Session-valid comparator, threshold = 1.4V: 0 = VBUS lower than threshold 1 = VBUS higher than threshold VBUS session-end comparator, threshold = 0.5V: 0 = VBUS higher than threshold 1 = VBUS lower than threshold ID_IN grounded: 0 = not grounded 1 = grounded ID_IN floating: 0 = not floating 1 = floating Set when Device A is configured, BDISC_ACONN is enabled and has attached pullup during HNP; cleared by resetting BDISC_ACONN bit in control register 1. Set when Device B is configured, BDISC_ACONN is enabled and has asserted an SE0 during HNP; cleared by resetting BDISC_ACONN bit in control register 1. Not used
VBUS_VALID
1
SESSION_ VALID
2
SESSION_END
3
ID_GND
4
ID_FLOAT
5 6 7
A_HNP B_HNP --
Table 8. Interrupt Register Address Map
REGISTER Interrupt Mask Interrupt Edge Interrupt Latch ADDRESS 14h 15h 16h POWER-UP REGISTER STATUS BIT7 0 0 0 BIT6 0 0 0 BIT5 0 0 0 BIT4 0 0 0 BIT3 0 0 0 BIT2 0 0 0 BIT1 0 0 0 BIT0 0 0 0
Table 9. Interrupt Mask Register (14h)
BIT NUMBER 0 1 2 3 4 5 6 7 SYMBOL VBUS_VALID_EN SESSION_ VALID_EN SESSION_ END_EN ID_GND_EN ID_FLOAT_EN A_HNP_EN -- -- OPERATION Enables VBUS_VALID interrupt Enables SESSION_VALID interrupt Enables SESSION_END interrupt Enables ID_GND interrupt Enables ID_FLOAT interrupt Enables A_HNP interrupt Not used Not used
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USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors MAX3353E
Table 10. Interrupt Edge Register (15h)
BIT NUMBER SYMBOL OPERATION VBUS_VALID interrupt on positive/negative edge: 0 = detected on negative edge 1 = detected on positive edge SESSION_VALID interrupt on positive/negative edge: 0 = detected on negative edge 1 = detected on positive edge Not used Not used Not used Not used Not used Not used 3 SESSION_ VALID _RN 2 VBUS_ VALID _RN VBUS_VALID negative edge interrupt request: 0 = not asserted 1 = asserted SESSION_ VALID negative edge interrupt request: 0 = not asserted 1 = asserted SESSION_END interrupt request: 0 = not asserted 1 = asserted ID_GND interrupt request: 0 = not asserted 1 = asserted ID_FLOAT interrupt request: 0 = not asserted 1 = asserted DP_SRP interrupt request: 0 = not asserted 1 = asserted
Table 11. Interrupt Latch Register (16h)
BIT NUMBER SYMBOL OPERATION VBUS_VALID positive edge interrupt request: 0 = not asserted 1 = asserted SESSION_ VALID positive edge interrupt request: 0 = not asserted 1 = asserted
0
VBUS_
VALID_ED
0
VBUS_VALID_RP
1
SESSION_ VALID_ED -- -- -- -- -- --
1
SESSION_ VALID _RP
2 3 4 5 6 7
4
SESSION_END_ RQ
5
ID_GND_RQ
6
ID_FLOAT_RQ
7
A_HNP_RQ
Table 12. Manufacturer and ID Register Address Map
REGISTER Manufacturer Register 0 Manufacturer Register 1 Manufacturer Register 2 Manufacturer Register 3 Product ID Register 0 Product ID Register 1 Product ID Register 2 Product ID Register 3 ADD 00h 01h 02h 03h 04h 05h 06h 07h BIT 7 0 0 0 0 0 0 0 0 BIT 6 1 0 1 0 1 1 1 0 BIT 5 1 0 0 1 0 0 0 0 BIT 4 0 0 1 1 0 1 0 0 BIT 3 1 1 0 0 1 1 0 0 BIT 2 0 0 0 0 0 0 0 0 BIT 1 1 1 1 1 0 1 1 0 BIT 0 0 1 1 1 0 0 0 1 hex 6A 0B 53 33 48 5A 42 01
16
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USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors
Connect all capacitors as close to the device as possible. VBUS and VCC bypass capacitors should have trace lengths as short as possible
Machine Model
The Machine Model for ESD tests all pins using a 200pF storage capacitor and zero discharge resistance. Its objective is to emulate the stress caused by contact that occurs with handling and assembly during manufacturing. All pins require this protection during manufacturing. The Machine Model is less relevant to I/O ports after PC board assembly.
MAX3353E
15kV ESD Protection
To protect the MAX3353E against ESD, D+, D-, ID_IN, and VBUS, have extra protection against static electricity to protect the device up to 15kV. The ESD structures withstand high ESD in all states--normal operation, shutdown, and powered down. In order for the 15kV ESD structures to work correctly, a 1F or greater capacitor must be connected from VBUS to GND. ESD protection can be tested in various ways; D+, D-, ID_IN, and VBUS are characterized for protection to the following limits: 1) 15kV using the Human Body Model 2) 6kV using the IEC 1000-4-2 Contact Discharge method 3) 11kV using the IEC 1000-4-2 Air-Gap Discharge method ESD Test Conditions: ESD performance depends on a variety of conditions. Contact Maxim for a reliability report that documents test setup, test methodology, and test results.
Layout Considerations
The MAX3353E high oscillator frequency makes proper layout important to ensure stability and maintain the output voltage under all loads. For best performance, minimize the distance between the capacitors and the MAX3353E.
UCSP Reliability
For the latest application details on UCSP construction, dimensions, tape-carrier information, printed circuit board techniques, bump-pad layout, and recommended reflow temperature profile as well as the latest information on reliability testing results, refer to Maxim Application Note: UCSP - A Wafer-Level Chip Scale Package available on Maxim's website at www.maxim-ic.com/ucsp.
Human Body Model
Figure 11 shows the Human Body Model and Figure 12 shows the current waveform it generates when discharged into a low impedance. This model consists of a 100pF capacitor charged to the ESD voltage of interest, which is then discharged into the test device through a 1.5k resistor. IEC 1000-4-2 The IEC 1000-4-2 standard covers ESD testing and performance of finished equipment; it does not specifically refer to integrated circuits. The major difference between tests done using the Human Body Model and IEC 1000-4-2 is a higher peak current in IEC 1000-4-2, because series resistance is lower in the IEC 1000-4-2 model. Hence, the ESD withstand voltage measured to IEC 1000-4-2 is generally lower than that measured using the Human Body Model. Figure 13 shows the IEC 1000-4-2 model. The Air-Gap Discharge test involves approaching the device with a charged probe. The Contact Discharge method connects the probe to the device before the probe is energized. Figure 14 shows the IEC 1000-4-2 current waveform.
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17
USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors MAX3353E
RC 1M CHARGE-CURRENTLIMIT RESISTOR HIGHVOLTAGE DC SOURCE RD 1.5k DISCHARGE RESISTANCE DEVICE UNDER TEST
IP 100% 90% AMPERES
Ir
PEAK-TO-PEAK RINGING (NOT DRAWN TO SCALE)
Cs 100pF
STORAGE CAPACITOR
36.8% 10% 0 0 tRL TIME tDL CURRENT WAVEFORM
Figure 11. Human Body ESD Test Models
Figure 12. Human Body Model Current Waveform
RC 50 to 100 CHARGE-CURRENTLIMIT RESISTOR HIGHVOLTAGE DC SOURCE
RD 330 DISCHARGE RESISTANCE DEVICE UNDER TEST
I 100% 90%
Figure 13. IEC 1000-4-2 ESD Test Model
IPEAK 10% t 30ns 60ns tr = 0.7ns TO 1ns
Cs 150pF
STORAGE CAPACITOR
Figure 14. IEC 1000-4-2 Current Waveform
18
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USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors
Pin Configurations
TOP VIEW
VCC 1 VL 2 SDA 3 ADD 4 SCL 5 INT 6 ID_OUT 7 VTRM 8 16 VBUS 15 C+ 0.1F 14 C13 GND 12 N.C. 11 ID_IN 10 D+ 9 DSCL C1VBUS CVBUS 1F ID_IN D+ DVBUS ID D+ DGND OTG CONNECTOR 4.7k 4.7k VL SDA VCC 0.1F VTRM C1+ CFLYING 0.1F 0.1F PULLUP RESISTORS
Typical Applications Circuit
VL VCC VTRM
MAX3353E
MAX3353EEUE
P
INT
MAX3353E
TSSOP
ID_OUT A D+ ID_IN GND CC+ DB DD+ ADD GND
MAX3353EEBP
VBUS
C
VTRM
ADD
VCC
Chip Information
TRANSISTOR COUNT: 9394 PROCESS: BiCMOS
D
ID_OUT 1
INT 2
SCL 3
SDA 4
VL 5
UCSP
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USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors MAX3353E
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
5x4 UCSP.EPS
PACKAGE OUTLINE, 5x4 UCSP 21-0095 I
1 1
20
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USB On-the-Go Charge Pump with Switchable Pullup/Pulldown Resistors
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
TSSOP4.40mm.EPS
MAX3353E
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 21 (c) 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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